Abstract
In this work, multicarrier pulse width modulation (MC-PWM) control methods are used to model and simulate an asymmetric cascaded multilevel inverter with fewer switches. The paper's ultimate goal is to generate many output levels using the fewest possible semiconductor chips. This article generates a 21-level output voltage using only 11 switches, 3 diodes, and 4 asymmetrical sources. The commutation of the switches is largely dependent on the modulation approach. Due to their lower total harmonic distortion (THD), lower switch ratings, lesser electromagnetic interference, and greater DC link voltages utilized for high-voltage and high-power applications, multilevel inverters perform much better than traditional two-level inverters. In order to enhance multilevel inverter performance and significantly lower overall cost and circuit complexity, a new twenty-one-level reduced switch cascaded multilevel inverter based on a multilevel DC link inverter architecture with reduced switching components is suggested in this study. Simulation is used to demonstrate the efficacy of the suggested system. MATLAB/Simulink is used to run the simulation. The simulation results demonstrate that the suggested multilevel inverter functions correctly to produce the multilayer output waveform with the fewest semiconductor devices and to achieve good dynamic performance with reduced THD.